Welcome to ECE 3401 - Digital Systems Design

Course Syllabus

Instructor

• Omer Khan
• Office: ITEB 447
• Email: khan@uconn.edu
• Office Hours: same as TA hours or by appointment via email

TAs

• Hanan Khan and Afif Siddiqi
• Tuesdays 1:45pm-3pm in ITE 330; Thursdays 1:45pm-3pm in ITE 401A

Announcements

• Exam 1 is scheduled in-person, in-class on March 10, 2026 (lectures 1 through 9 inclusive)

Lectures

• Lecture 1: Logic Design Review I - PDF (textbook reading: 1.1 - 1.6)
• Lecture 2: Logic Design Review II - PDF (textbook reading: 1.7 - 1.8)
• Lecture 2b: Combinatorial Logic and VHDL - PDF (textbook reading: 2.1 - 2.3)
• Lecture 3: Combinatorial Logic and VHDL - PDF (textbook reading: 2.3, 2.4, 2.12.1, 2.10, 2.13) (VHDL combinational design examples: VHDLCombs26.zip)
• Lecture 4: Sequential Logic and VHDL - PDF (textbook reading: 2.5, 2.6, 2.7) (VHDL sequential design examples: VHDLSeqs26.zip)
• Lecture 5: FSMs and VHDL - PDF (textbook reading: 2.12.2, 2.15.1) (VHDL sequential design examples: VHDLSeqs26.zip)
• Lecture 6: VHDL Simulation and Synthesis I - PDF (textbook reading: 2.8, 2.9) (VHDL Simulation design examples: VHDLSims26.zip)
• Lecture 7: VHDL Simulation and Synthesis II - PDF (textbook reading: 2.11, 2.14)
• Lecture 8: Synchronous Designs - PDF (textbook reading: part of lecture from 2.16, 2.17) (VHDL design part 1 examples: VHDLDesign1s26.zip)
• Lecture 9: Computer Arithmetic I - PDF (textbook reading: part of lecture from 4.3) (VHDL design part 2 examples: VHDLDesign2s26.zip)
• Lecture 10: Computer Arithmetic II - PDF (textbook reading: part of lecture from 4.3, 4.8, 4.9, 4.10)

Homeworks (due at HuskyCT specified deadline - no late submissions will be accepted)

• Homework 1: PDF, Solution PDF (due via HuskyCT on Jan 30, 2026 11:59pm EST)
• Homework 2: PDF (VHDL codes: HW2vhdlcodes.zip), Solution PDF (due via HuskyCT on Feb 12, 2026 11:59pm EST)
• Homework 3: PDF, Solution PDF (due via HuskyCT on Feb 19, 2026 11:59pm EST)
• Homework 4: PDF (VHDL codes: hw4s26.zip) (due via HuskyCT on March 5, 2026 11:59pm EST)

Programming Assignments (due at HuskyCT specified deadline - no late submissions will be accepted)

• VHDL Toolchain guide to setup the required open-source software PDF (no due date, but complete at the earliest!)
• PA 0 (due via HuskyCT on Jan 30, 2026): Complete all steps for the toolchain setup and run the lab0 with test0 testbench. Upload a single PDF of your waveform in HuskyCT. PA0 PDF, lab0.vhd, test0.vhd, Makefile
• PA 1 (due via HuskyCT on Feb 27, 2026): Digital Design of General Matrix-Matrix Multiplication (GEMM) PA1-Handout PDF, pa1s26.zip